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Computer System Architecture Questions Answers

1. Which among following can be considered as most advanced ROM ?
1. DRAM
2. EEPROM
3. RAM
4. PROM
Answer And Explanation

Answer: Option B

Explanation:

EEPROM means Electrically Erasable Programmable Read-Only Memory.
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2. One byte equals to how many bits ?
1. 4 bits
2. 8 bits
3. 12 bits
4. 16 bits
Answer And Explanation

Answer: Option B

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3. Which among following is Volatile ?
1. ROM
2. EPROM
3. DROM
4. RAM
Answer And Explanation

Answer: Option D

Explanation:
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4. Where the result of an arithmetic and logical operation are stored ?
1. In Accumulator
2. In Cache Memory
3. In ROM
4. In Instruction Registry
Answer And Explanation

Answer: Option A

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5. Why we need to have secondary storage ?
1. Store large volume of data that exceed the capacity of main memory
2. Perform arithmatic and logical operations
3. To give power to the system too
4. To help processor in processing
Answer And Explanation

Answer: Option A

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6. Which determines the address of I/O interface ?
1. Register select
2. Chip select
3. Both of above
4. None of above
Answer And Explanation

Answer: Option C

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7. An exception condition in a computer system caused by an event external to the CPU is known as ?
1. Halt
2. Process
3. Interrupt
4. None of above
Answer And Explanation

Answer: Option C

Explanation:

In my own experience I found very few questions with answer "None of above", if you do not know the answer then its always better to guess among other (If there is no negative marking) ;)
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Computer System Architecture Questions Answers

8. Whenever CPU detects an interrupt, what it do with current state ?
1. Save it
2. Discard it
3. Depends system to system
4. First finish it
Answer And Explanation

Answer: Option A

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9. I/O processor has direct access to ?
1. Main Memory
2. Secondary Memory
3. Flash Memory
4. ROM
Answer And Explanation

Answer: Option A

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10. The address mapping is done, when the program is initially loaded is called ?
1. Relocation
2. Dynamic relocation
3. Static relocation
4. Executable relocation
Answer And Explanation

Answer: Option C

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11. The unit which decodes and translates each instruction and generates the necessary enable signals for ALU and other units is called
1. ALU
2. Control Unit
3. CPU
4. Logical Unit
Answer And Explanation

Answer: Option B

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12. A microprogram is sequencer perform the operation ?
1. Read
2. Write
3. Read and Write
4. Read and Execute
Answer And Explanation

Answer: Option D

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13. Which among following is an important data transfer technique ?
1. CAD
2. CAM
3. DMA
4. MMA
Answer And Explanation

Answer: Option C

Explanation:

DMA is Direct Memory Access.
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14. RISC stands for ?
1. Risk Instruction Source Computer
2. Reduced Instruction Set Computer
3. Risk Instruction Set Computer
4. Risk Instruction Set Computing
Answer And Explanation

Answer: Option B

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Computer System Architecture Questions Answers

15. The performance of the cache memory is measured in terms of ?
1. Hit Ratio
2. Chat Ratio
3. Copy Ratio
4. Data Ratio
Answer And Explanation

Answer: Option A

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16. A set of physical addresses is also known as ?
1. Disk Space
2. Address Space
3. Memory Space
4. Locations
Answer And Explanation

Answer: Option C

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17. Which devices among following are usually designed on the complex electromechanical principle ?
1. Printing devices
2. Input devices
3. Storage devices
4. Peripheral devices
Answer And Explanation

Answer: Option B

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18. __ read the data by reflecting pulses of laser beams on the surface ?
1. Magnetic disk
2. Optical disk
3. Floppy disk
4. ROM
Answer And Explanation

Answer: Option B

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19. If CPU and I/O interface share a common bus than transfer of data between two units is known as ?
1. Asynchronous
2. Clock dependent
3. Synchronous
4. Decoder independent
Answer And Explanation

Answer: Option C

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20. All the operations in a digital system are synchronized by a clock that is generated by ?
1. Clock
2. Clock generator
3. Pulse
4. Pulse generator
Answer And Explanation

Answer: Option D

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21. Asynchronous means ?
1. Not in step with the elapse of time
2. Not in step with the elapse of address
3. Not in step with the elapse of data
4. Not in step with the elapse of control
Answer And Explanation

Answer: Option A

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Computer System Architecture Questions Answers

22. __ is a single control line that informs destination unit that a valid is available on the bus ?
1. Ping
2. Token
3. Handshake
4. Strobe
Answer And Explanation

Answer: Option D

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23. Which technique has one or more control signal for acknowledgement that is used for intimation ?
1. Ftp
2. Ping
3. Strobe
4. Handshaking
Answer And Explanation

Answer: Option D

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24. A keyboard has which type of asynchronous transfer mode ?
1. Serial
2. Parralel
3. Optimal
4. Joint
Answer And Explanation

Answer: Option A

Explanation:

In serial transfer each bit is sent one after the another in a sequence of event and requires just one line.
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25. Which technique helps processor to run a program concurrently with input output operations ?
1. IOP
2. DMA
3. Interrupt driven I/O
4. DCA
Answer And Explanation

Answer: Option C

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26. Which exception is also known software interrupt ?
1. Trap
2. Call
3. System Call
4. All of above
Answer And Explanation

Answer: Option C

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27. User programs interact with I/O devices through ?
1. Operating System
2. Hardware
3. Buses
4. Processor
Answer And Explanation

Answer: Option A

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28. Which table handle store address of interrupt handling subroutine ?
1. Vector table
2. Symbol link table
3. Interrupt vector table
4. None of above
Answer And Explanation

Answer: Option C

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Computer System Architecture Questions Answers

29. Which interrupt establishes a priority over the various sources to determine which request should be entertained first ?
1. Polling
2. Daisy chaining
3. Priority interrupt
4. All of above
Answer And Explanation

Answer: Option C

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30. Which technique is used that identifies the highest priority resource by means of software ?
1. Daisy chaining
2. Polling
3. Priority
4. Chaining
Answer And Explanation

Answer: Option B

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31. Which method is used to establish priority by serially connecting all devices that request an interrupt ?
1. Interrupt
2. Polling
3. Priority
4. Daisy chaining
Answer And Explanation

Answer: Option D

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32. What is meaning of "VAD" ?
1. Velocity Address
2. Viscous Address
3. Vector Address
4. Volatile Address
Answer And Explanation

Answer: Option C

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33. What is meaning of DMAC ?
1. Dual memory access controller
2. Direct memory access controller
3. Direct memory access computer
4. Direct memory accumulator controller
Answer And Explanation

Answer: Option B

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34. What is meaning of IOP ?
1. Input output processor
2. Input output product
3. Input output producer
4. Input output processing
Answer And Explanation

Answer: Option A

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35. Which refers the execution of various software process concurrently ?
1. IOP
2. DCP
3. Multiprocessor
4. Serial Communication
Answer And Explanation

Answer: Option C

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Computer System Architecture Questions Answers

36. Which is used for this and known as high speed buffer exist with almost each process ?
1. Primary
2. Secondary
3. Cache
4. RAM
Answer And Explanation

Answer: Option C

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37. In which condition only one process holds a resource at a given time ?
1. Circular queue
2. Hold and Wait
3. Mutual exclusion
4. Non preemption
Answer And Explanation

Answer: Option C

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38. In which condition one process holds the allocated resources and other waits for it ?
1. Non preemption
2. Mutual exclusion
3. Hold and wait
4. All of above
Answer And Explanation

Answer: Option C

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39. What is meaning of PCB ?
1. Process control block
2. Preempitive control block
3. Process close block
4. Process carrying block
Answer And Explanation

Answer: Option A

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40. Arithmetic instruction are used to perform operation on ?
1. Non Numerical data
2. Numerical data
3. Both of above
4. None of above
Answer And Explanation

Answer: Option B

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41. What Mnemonic represents ?
1. Strings
2. Physical Address
3. Operation Address
4. Operation codes
Answer And Explanation

Answer: Option D

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42. What is full form of LED ?
1. Low Emitting Diode
2. Light Emitting Diode
3. Light Emitting Data
4. Light Encounter Diode
Answer And Explanation

Answer: Option B

Explanation:

In optical mouse we use pair of LED.
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Computer System Architecture Questions Answers

43. Multiprocessor uses large caches but limited process that shares ___ ?
1. Control Bus
2. Memory Bus
3. Multiple memory bus
4. Single memory bus
Answer And Explanation

Answer: Option D

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44. Intercrosses arbitration system for multiprocessor shares a __ ?
1. Control Bus
2. Domain Bus
3. Primary Bus
4. Common Bus
Answer And Explanation

Answer: Option D

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45. What is full form of LSD ?
1. Less significant data
2. Less significant digit
3. Least significant data
4. Least significant digit
Answer And Explanation

Answer: Option D

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46. Which system was used extensively by early mini computers ?
1. Binary number
2. Decimal number
3. Hexadecimal number
4. Octal number
Answer And Explanation

Answer: Option D

Explanation:

Note : Please note that question is asked about early mini computers.
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47. Three bit binary numbers can be represented by ?
1. Binary number
2. Decimal number
3. Hexadecimal number
4. Octal number
Answer And Explanation

Answer: Option D

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48. Which operation with floating point numbers are more complicated then arithmetic operation with fixed point number ?
1. Logical operation
2. Arithmetic operation
3. Both of above
4. None of above
Answer And Explanation

Answer: Option B

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49. In stack organization the insertion operation is known as ?
1. Pop
2. Push
3. Down
4. Upper
Answer And Explanation

Answer: Option B

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Computer System Architecture Questions Answers

50. EA stands for ?
1. Effective address
2. Effective absolute
3. Effective add
4. End address
Answer And Explanation

Answer: Option A

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51. The operating mode of I/O devices is __ for different devices ?
1. Same
2. Different
3. Optimum
4. Medium
Answer And Explanation

Answer: Option B

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52. ____ processor has to check continuously till device becomes ready for transferring the data ?
1. DMA
2. Interrupt-initiated I/O
3. IOP
4. DCP
Answer And Explanation

Answer: Option B

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53. Instruction that are used for reading from memory by an IOP called ?
1. Commands
2. Pulses
3. Blocks
4. Interrupt
Answer And Explanation

Answer: Option A

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54. Which memory is assembled between main memory and CPU ?
1. Primary Memory
2. Secondary Memory
3. Registers
4. Cache Memory
Answer And Explanation

Answer: Option D

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55. A number system that uses only two digits, 0 and 1 is known as ?
1. Octal number system
2. Hexadecimal system
3. Binary system
4. Decimal system
Answer And Explanation

Answer: Option C

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56. Which system has a base or radix of 10 ?
1. Binary
2. Octal
3. Hexadecimal
4. Decimal
Answer And Explanation

Answer: Option D

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Computer System Architecture Questions Answers

57. An instruction code must specify the address of the ?
1. Operand
2. Opecode
3. Both of above
4. None of above
Answer And Explanation

Answer: Option A

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58. UMA stands for ?
1. Unit memory access
2. Uniform memory access
3. Unit memory array
4. Unit metadata access
Answer And Explanation

Answer: Option B

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59. Which types of register holds a single vector containing at least two read ports and one write ports ?
1. Data system
2. Vector register
3. Database
4. Memory
Answer And Explanation

Answer: Option B

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60. Which register is memory pointer ?
1. Source index
2. Instruction register
3. Stack pointer
4. Program counter
Answer And Explanation

Answer: Option D

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61. In which of the following status flags required for data transfer are present ?
1. Interface Circuit
2. Parallel Line
3. Device Circuit
4. None of Above
Answer And Explanation

Answer: Option A

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Process finished with exit code 0

qs

Computer System Architecture Questions Answers

1. Which among following can be considered as most advanced ROM ?

2. One byte equals to how many bits ?

3. Which among following is Volatile ?

4. Where the result of an arithmetic and logical operation are stored ?

5. Why we need to have secondary storage ?

6. Which determines the address of I/O interface ?

7. An exception condition in a computer system caused by an event external to the CPU is known as ?

Computer System Architecture Questions Answers

8. Whenever CPU detects an interrupt, what it do with current state ?

9. I/O processor has direct access to ?

10. The address mapping is done, when the program is initially loaded is called ?

11. The unit which decodes and translates each instruction and generates the necessary enable signals for ALU and other units is called

12. A microprogram is sequencer perform the operation ?

13. Which among following is an important data transfer technique ?

14. RISC stands for ?

Computer System Architecture Questions Answers

15. The performance of the cache memory is measured in terms of ?

16. A set of physical addresses is also known as ?

17. Which devices among following are usually designed on the complex electromechanical principle ?

18. __ read the data by reflecting pulses of laser beams on the surface ?

19. If CPU and I/O interface share a common bus than transfer of data between two units is known as ?

20. All the operations in a digital system are synchronized by a clock that is generated by ?

21. Asynchronous means ?

Computer System Architecture Questions Answers

22. __ is a single control line that informs destination unit that a valid is available on the bus ?

23. Which technique has one or more control signal for acknowledgement that is used for intimation ?

24. A keyboard has which type of asynchronous transfer mode ?

25. Which technique helps processor to run a program concurrently with input output operations ?

26. Which exception is also known software interrupt ?

27. User programs interact with I/O devices through ?

28. Which table handle store address of interrupt handling subroutine ?

Computer System Architecture Questions Answers

29. Which interrupt establishes a priority over the various sources to determine which request should be entertained first ?

30. Which technique is used that identifies the highest priority resource by means of software ?

31. Which method is used to establish priority by serially connecting all devices that request an interrupt ?

32. What is meaning of "VAD" ?

33. What is meaning of DMAC ?

34. What is meaning of IOP ?

35. Which refers the execution of various software process concurrently ?

Computer System Architecture Questions Answers

36. Which is used for this and known as high speed buffer exist with almost each process ?

37. In which condition only one process holds a resource at a given time ?

38. In which condition one process holds the allocated resources and other waits for it ?

39. What is meaning of PCB ?

40. Arithmetic instruction are used to perform operation on ?

41. What Mnemonic represents ?

42. What is full form of LED ?

Computer System Architecture Questions Answers

43. Multiprocessor uses large caches but limited process that shares ___ ?

44. Intercrosses arbitration system for multiprocessor shares a __ ?

45. What is full form of LSD ?

46. Which system was used extensively by early mini computers ?

47. Three bit binary numbers can be represented by ?

48. Which operation with floating point numbers are more complicated then arithmetic operation with fixed point number ?

49. In stack organization the insertion operation is known as ?

Computer System Architecture Questions Answers

50. EA stands for ?

51. The operating mode of I/O devices is __ for different devices ?

52. ____ processor has to check continuously till device becomes ready for transferring the data ?

53. Instruction that are used for reading from memory by an IOP called ?

54. Which memory is assembled between main memory and CPU ?

55. A number system that uses only two digits, 0 and 1 is known as ?

56. Which system has a base or radix of 10 ?

Computer System Architecture Questions Answers

57. An instruction code must specify the address of the ?

58. UMA stands for ?

59. Which types of register holds a single vector containing at least two read ports and one write ports ?

60. Which register is memory pointer ?

61. In which of the following status flags required for data transfer are present ?

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